purdue-onchip / gds2Para Star 138 Code Issues Pull requests GDSII File Parsing, IC Layout Analysis, and Parameter Extraction parse eda vlsi integrated-circuits interconnect gdsii spef electronic-design-automation vlsi-circuits Updated Apr 23, 2023 C++
OpenTimer / Parser-SPEF Star 62 Code Issues Pull requests A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF). eda circuits cpp17 vlsi computer-aided-design vlsi-physical-design sta spef electronic-design-automation vlsi-circuits parasitic static-timing-analysis Updated Aug 7, 2022 C++
EDDRSoftware / edaNameTranslator Star 7 Code Issues Pull requests A library to translate strings between common EDA naming conventions. vhdl utf-8 naming-conventions spice verilog edifact spf-parse translated-strings openaccess lef-def cdba spef Updated Jun 27, 2017 C++
vyges-tools / est Star 0 Code Issues Pull requests Parasitic estimation from placement: Steiner-tree RC networks per corner, written as SPEF. rust asic eda opendb spef static-timing-analysis physical-design open-source-silicon parasitics Updated Oct 30, 2026 Rust
vyges-tools / extract Star 0 Code Issues Pull requests RC parasitic extraction: routed layout to SPEF, with a calibrated sky130 deck. rust asic digital analog eda semiconductor mixed-signal silicon opendb spef physical-design open-source-silicon eda-tools rc-extraction vyges open-silicon vyges-loom parasitic-extraction Updated Oct 30, 2026 Rust